We have a blog post today from Ze'ev Wurman, the Chief Software Architect of MonolithIC 3D Inc. Ze'ev spent many years leading EDA/software work at Dynachip, eASIC and Amdahl. In today's post, he explores vertical integration in the world of FPGAs.
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We have a blog post today from Ze'ev Wurman, the Chief Software Architect of MonolithIC 3D Inc. Ze'ev spent many years leading EDA/software work at Dynachip, eASIC and Amdahl. In today's post, he explores vertical integration in the world of FPGAs.
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Semiconductor Manufacturing & Design has a very interesting discussion of the ways that die stacking will impact final product yields.
According to the report in EETimes, the group of companies contributing to the 3-D enablement program at SEMATECH has just grown by six.
For the past 40 years, semiconductor technologists relied on improvements in lithography to "cram more components onto integrated circuits". Toshiba, Samsung and other non-volatile memory companies are betting the future will be different. Let's look at the fascinating idea they're pursuing...
From what I hear at meetings, Qualcomm is one of the companies really driving towards production of 3D chips/packages. Of course, it makes perfect sense given their commitment to the mobile market, with its attendant constraints on power and footprint combined demands for significantly better system performance.
Dr. Garrou has an excellent post that includes a segment on work at Penn State and IBM on the ways that dense TSVs can impact thermal management.
 We have a guest contribution today from Israel Beinglass, the CTO of MonolithIC 3D Inc. Israel was an executive at Applied Materials for many years, and is considered one of the leading industry experts in epi technology. He served as a board member at SiGen in the late 1990s (for those who are not familiar with SiGen, it was one of the first companies that worked on ion-cut technology). In this post, Israel discusses and compares different techniques to obtain stacked monocrystalline semiconductor layers.
The DAC Blog has a very nice report on Dr. Walden Rhines' discussion of 3D ICs at the recent GlobalPress event. The post presents more details than I've seen in other reports. If you're interested in seeing what one of the true EDA luminaries is thinking about 3D, go read this post...
Electronics Weekly has an interesting story about a pile of EV Group (EVG) equipment going in to a 300mm line at CEA-Leti.
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