Papers, Presentations and Patents

Others work relevant to monolithic 3D IC

What is 3DIC Technology? – How Does it Work?, Synopsys.
Events Organized by IEEE SSCS Romania Chapter, IEEE Solid-State Circuits Magazine, November 17th, 2021.
Transistors Will Stop Shrinking in 2021, Moore’s Law Roadmap Predicts, By Rachel Courtland, July 22, 2016.
Leti Extends Collaboration With Qualcomm On CoolCube 3D Integration Technology, April 12, 2016
Stanford-led skyscraper-style chip design boosts electronic performance by factor of a thousand, Stanford Report, December 9, 2015.
Moore's Law at 50: Are we planning for retirement?, IEDM Conference,Plenary talk: Greg Yeric, ARM Research Fellow, December 7, 2015.
"Silicon Wafer Bonding Technology for VLSI and MEMS applications", The ELTRAN (SOI-Epi WaferTM) Technology, Takao Yonehara.
Monolithic 3D processing using non-equilibrium RTP, By Ed Korczynski, Senior Technical Editor, Solid State Technology, April 17, 2015.
From 2D to Monolithic 3D: Design Possibilities, Expectations and Challenges, Oliver Billoint, LETI, 2015.
3D VLSI: Next Generation 3D Integration Technology, by Karim Arabi, VP of Qualcomm, at 2015 ISPD.
3D Qualcomm SoCs by 2016, EE Times Article by R. Colin Johnson, March 31st, 2015.
Memory leads the way to better computing, H.-S. Philip Wong and Sayeef Salahuddin, March 17th, 2015.
3D stacking offers an extension for Moore's Law, E&T Magazine by Chris Edwards, February 16th, 2015.
Leti Devices Workshop, Leti San Francisco, December 14th, 2014.
True 3-D Chip Harness Nanotubes, EE Times Article by R. Colin Johnson, December 19th, 2014.
Novel Low Temperature 3D Wafer Stacking Technology for High Density Device Integration, by Dr. Ionut Radu, Soitec, Bucharest 2013.
Going Up! Monolithic 3D As An Alternative to CMOS Scaling, by Jean-Eric Michallet, Hughes Metras and Perrine Batude (CEA-Leti), April 9th, 2014.
Rise of the Monolithic 3D Chip, IEEE Spectrum, February 24th, 2014.
CMOS technologies: Our most power efficient solution today and our vision toward 10nm node and beyond, Leti Devices Workshop, December 8, 2013
High-Density Integration of Functional Modules Using Monolithic 3D-IC Technology, Dept. of Electrical and Computer Engineering, Georgia Tech, Atlanta GA, USA and Qualcomm Research, San Diego, CA, USA
Low Power Design, Past and Future (monolithic 3D), By Bob Brodersen (UCB), Anantha Chandrakasan (MIT) and Dejan Markovic (UCLA).
Cramming more components onto integrated circuits, By Gordon E. Moore.
Monolithic 3D chip fabricated without TSVs, Solid State Technology blog post.
New 3D Approaches: Enabling Technologies for Nanoelectronic Devices, Soitec at CEA-LETI 15thAnnual Review
3D-IC Integration (CMP 3D IC presentation)
Helping Flash Memory Grow Up: Etch Technology For The Terabit Era (The Applied Materials Blog)
CMP 3D-IC Integration (Cirsuit's Multi Projects Webpage) .
Monolithic 3D-ICs with single grain Si thin film transistors (Solid State Electronics An International Journal)
Cost Efficient Wafer-Level Stacking Technologies (Chip Scale Review - Digital Edition - January - February 2013, pg. 26-30)
Building block for wafer-level 3D Integration (Solid State Technology Magazine)
Michio Kaku: Tweaking Moore’s Law (Video)

Papers and Presentations

Chapter 11, 3D for Efficient FPGA, Zvi Or-Bach, June 2020.
Modified ELTRAN® - A Game Changer for Monolithic 3D, Zvi Or-Bach, Brian Cronquist, Zeev Wurman, Israel Beinglass, and Albert K. Henning, October 2015.
MonolithIC 3D – The Most Effective Path for Future IC Scaling, MonolithIC 3D Inc., October 2015.
CHIPS 2020 VOL. 2: New Vistas in Nanoelectronics - Chapter "Monolithic 3D Integration", page 51-91, Zvi Or-Bach, October 2015.
"Monolithic 3D Advantage", Free E-book, November 2014.
Precision Bonders - A Game Changer for Monolithic 3D, IEEE S3S 2014, October 2014.
Monolithic 3D Integrated Circuits, NCCAVS Joint User Group Meeting, June 12, 2014
A disruptor to the semiconductor industry The Monolithic 3D IC, ITHERM 2014, May 2014.
Monolithic 3D Integrated Circuits - Zvi Or-Bach Technion Lecture, Israel, March 2014 (video lecture).
"Der Ausweg aus dem Skalierungs-Dilemma?", Electronic Information, Germany, January 2014.
"THE MONOLITHIC 3D-IC", Slide Presentation at the 2013 S3S Conference, October 2013.
"Practical Process Flows for Monolithic 3D", 3D Plenary Talk held at the 2013 S3S Conference, October 2013.
"The Monolithic 3D Advantage", Tutorial presented at the 2013 IEEE 3DIC Conference, October 2013.
"Thermal Considerations for Monolithic Integration of Three-Dimensional Integrated Circuits", Poster presented at the 2013 S3S Conference, October 2013.
"Pulsed Laser Annealing: A scalable and practical technology for monolithic 3D IC", Paper presented at the 2013 IEEE 3DIC Conference, October 2013.
"MonolithIC 3D™ - the Future of Semiconductor Scaling", Presentation at Semicon West 2013 - SIF, July 2013.
"Monolithic 3D Memory - NAND Flash, DRAM and R-RAM", Free E-book, March 2013.
"Monolithic 3D - In General", Free E-book, March 2013.
"Monolithic 3D Advantage", Free E-book, February 2013
"The Monolithic 3D Advantage", Paper, January 2013
"Cooling Three-Dimensional Integrated Circuits using Power Delivery Networks", Paper at the IEDM Conference, Dec 2012 (paper) (slides).
"Monolithic 3D Integrated Circuits", Guest Lecture at Technion City, January 1st, 2013
"The First Step to Take When You Consider Taking Your Scientific Breakthrough to Startup", Guest Lecture at Technion City, January 1st, 2013
MonolithIC 3D-ICs RCAT, HKMG , RCJLT and 3D Embedded eDRAM Approach, MonolithIC 3D Inc., Free E-book, December 2012
"The Short, Medium and Long-Term Path to the 3D Ecosystem", Panel Discussion at EDPS, April 5th, 2012
"Monolithic 3D-ICs with Single Crystal Silicon Layers", Invited paper at the IEEE 3DIC conference, 2012 (paper) (slides)
"Fine-Grained 3D Integration", Invited talk at the IEEE Components, Packaging and Manufacturing Technology (CPMT) Society, January 11, 2012
"Monolithic 3D - The effective alternative to Dimensional Scaling", Invited lecture at the Technion - Israel Institute of Technology, November 21, 2011
"3D: Where are we today; Where are we going; and How will you get there with us?", Invited talk at the 9th International System-on-Chip (SoC) Conference, Exhibit & Workshops in Southern California, November 2-3, 2011
"Monolithic 3D-ICs: The Effective Alternative to Dimensional Scaling", Invited keynote speech at the Intl. Electronics Forum in Seville, October 7, 2011
"Resistive RAM: Technology and Market Applications", Invited Talk at the University of California, Berkeley, September 2011
"Monolithic 3D Integrated Circuits", Invited Talk at Intel Research (Photonics Technology Lab), July 2011
"Monolithic 3D Integrated Circuits", Invited Talk at the CMOS Emerging Technologies Workshop, June 2011
"Monolithic 3D DRAM Technology", Invited Talk at the American Vacuum Society Workshop on 3D Packaging, June 2011
"The Monolithic 3D-IC", Invited Talk at the 3D Workshop at the Intl. Conference on Technology & Instrumentation in Particle Physics, June 2011
"Monolithic 3D FPGAs", Invited Talk at the Intl. Memory Workshop, May 2011
"Monolithic 3D Integrated Circuits", Invited Talk at the Technical University of Munich, May 2011
"Monolithic 3D Integrated Circuits", appears in Issue #37 of Future-Fab International, April 2011
"Monolithic 3D Technology: Nu3D-IC, A Semiconductor Industry Game Changer", Invited Presentation at the 3D-ASIP Conference, Dec 2010.

"Resistive RAM: Technology and Market Applications", Invited Presentation at the IEEE-SCV Electron Devices Society, Nov 2010.

"3D-FPGA: The Path to ASIC-like Density, Power and Performance", Invited Presentation at the Applied Materials 3D Interconnect Symposium, Jan 2010.

Patents

Only issued patents are listed below. We have 200+ patents pending at the US Patent Office.

US Patent 11,355,381 3D semiconductor memory device and structure, Issued June 7th, 2022.
US Patent 11,355,380 Methods for producing 3D semiconductor memory device and structure utilizing alignment marks, Issued June 7th, 2022.
US Patent 11,342,214 Methods for producing a 3D semiconductor memory device and structure, Issued May 24th, 2022.
US Patent 11,341,309 Automation for monolithic 3D devices, Issued May 24th, 2022.
US Patent 11,335,731 3D semiconductor device and structure with transistors, Issued May 17th, 2022.
US Patent 11,329,059 3D memory devices and structures with thinned single crystal substrates, Issued May 10th, 2022.
US Patent 11,327,227 Multilevel semiconductor device and structure with electromagnetic modulators, Issued May 10th, 2022.
US Patent 11,315,980 3D semiconductor device and structure with transistors, Issued April 26th, 2022.
US Patent 11,315,965 3D micro display semiconductor device and structure, Issued April 26th, 2022.
US Patent 11,309,292 3D semiconductor device and structure with metal layers, Issued April 19th, 2022.
US Patent 11,296,115 3D semiconductor device and structure, Issued April 5th, 2022.
US Patent 11,296,106 3D memory semiconductor devices and structures, Issued April 5th, 2022.
US Patent 11,276,687 3D semiconductor device and structure, Issued March 15th, 2022.
US Patent 11,270,988 3D semiconductor device(s) and structure(s) with electronic control units, Issued March 8th, 2022.
US Patent 11,270,055 Automation for monolithic 3D devices, Issued March 8th, 2022.
US Patent 11,257,867 3D semiconductor device and structure with oxide bonds, Issued February 22nd, 2022.
US Patent 11,257,689 3D semiconductor device and structure, Issued February 22nd, 2022.
US Patent 11,251,149 3D memory device and structure, Issued February 15th, 2022.
US Patent 11,233,069 3D semiconductor device and structure, Issued January 25th, 2022.
US Patent 11,227,897 Method for producing a 3D semiconductor memory device and structure, Issued January 18th, 2022.
US Patent 11,217,565 Method to form a 3D semiconductor device and structure, Issued January 4th, 2022.
US Patent 11,217,472 3D semiconductor device and structure with multiple isolation layers, Issued January 4th, 2022.
US Patent 11,211,279 Method for processing a 3D integrated circuit and structure, Issued December 28th, 2021.
US Patent 11,205,034 Automation for monolithic 3D devices, Issued December 21st, 2021.
US Patent 11,177,140 3D semiconductor device and structure, Issued November 16th, 2021.
US Patent 11,164,898 Multilevel semiconductor device and structure, Issued November 2nd, 2021.
US Patent 11,164,811 3D semiconductor device with isolation layers and oxide-to-oxide bonding, Issued November 2nd, 2021.
US Patent 11,164,770 Method for producing a 3D semiconductor memory device and structure, Issued November 2nd, 2021.
US Patent 11,163,112 Multilevel semiconductor device and structure with electromagnetic modulators, Issued November 2nd, 2021.
US Patent 11,158,674 Method to produce a 3D semiconductor device and structure, Issued October 26th, 2021.
US Patent 11,158,652 3D memory semiconductor devices and structure, Issued October 26th, 2021.
US Patent 11,158,598 Method to construct 3D devices and system, Issued October 26th, 2021.
US Patent 11,152,386 3D semiconductor device and structure, Issued October 19th, 2021.
US Patent 11,145,657 3D semiconductor device and structure, Issued October 12th, 2021.
US Patent 11,133,351 3D semiconductor device and structure, Issued September 28th, 2021.
US Patent 11,133,344 Multilevel semiconductor device and structure with image sensors, Issued September 28th, 2021.
US Patent 11,121,246 3D semiconductor device and structure with memory, Issued September 14th, 2021.
US Patent 11,121,121 3D semiconductor device and structure, Issued September 14th, 2021.
US Patent 11,121,021 3D semiconductor device and structure, Issued September 14th, 2021.
US Patent 11,114,464 3D semiconductor device and structure, Issued September 7th, 2021.
US Patent 11,114,427 3D semiconductor processor and memory device and structure, Issued September 7th, 2021
US Patent 11,107,808 3D semiconductor device and structure, Issued August 31st, 2021.
US Patent 11,107,803 Method to construct 3D devices and systems, Issued August 31st, 2021.
US Patent 11,107,721 3D semiconductor device and structure with NAND logic, Issued August 31st, 2021.
US Patent 11,106,853 Automation for monolithic 3D devices, Issued August 31st, 2021.
US Patent 11,101,266 3D device and devices with bonding, Issued August 24th, 2021.
US Patent 11,094,576 Methods for producing a 3D semiconductor memory device and structure, Issued August 17th, 2021.
US Patent 11,088,130 3D semiconductor device and structure, Issued August 10th, 2021.
US Patent 11,088,050 3D semiconductor device with isolation layers, Issued August 10th, 2021.
US Patent 11,087,995 3D semiconductor device and structure, Issued August 10th, 2021.
US Patent 11,069,697 3D memory semiconductor devices and structures, Issued July 20th, 2021.
US Patent 11,063,071 Multilevel semiconductor device and structure with waveguides, Issued July 13th, 2021.
US Patent 11,063,024 Method to form a 3D semiconductor device and structure, Issued July 13th, 2021.
US Patent 11,056,468 3D semiconductor device and structure, Issued July 6th, 2021.
US Patent 11,043,523 Multilevel semiconductor device and structure with image sensor, Issued June 22nd, 2021.
US Patent 11,031,394 3D semiconductor device and structure, Issued June 8th, 2021.
US Patent 11,031,275 3D semiconductor device and structure with memory, Issued June 8th, 2021.
US Patent 11,030,371 Automation for monolithic 3D devices, Issued June 8th, 2021.
US Patent 11,024,673 3D semiconductor device and structure, Issued June 1st, 2021.
US Patent 11,018,191 3D semiconductor device and structure, Issued May 25th, 2021.
US Patent 11,018,156 3D memory semiconductor devices and structures, Issued May 25th, 2021.
US Patent 11,018,133 3D integrated circuit, Issued May 25th, 2021.
US Patent 11,018,116 Method to form a 3D semiconductor device and structure, Issued May 25th, 2021.
US Patent 11,018,042 3D semiconductor memory device and structure, Issued May 25th, 2021.
US Patent 11,011,507 3D semiconductor device and structure, Issued May 18th, 2021
US Patent 11,004,967 3D semiconductor device and structure with memory, Issued May 11th, 2021.
US Patent 11,004,719 Methods for producing a 3D semiconductor memory device and structure, Issued May 11th, 2021.
US Patent 11,004,694 3D semiconductor device and structure, Issued May 11th, 2021.
US Patent 10,998,374 Multilevel semiconductor device and structure, Issued May 4th, 2021.
US Patent 10,991,675 3D semiconductor device and structure, Issued April 27th, 2021.
US Patent 10,978,501 Multilevel semiconductor device and structure with waveguides, Issued April 13th, 2021.
US Patent 10,964,807 3D semiconductor device with memory, Issued March 30th, 2021.
US Patent 10,950,599 3D semiconductor device and structure, Issued March 16th, 2021.
US Patent 10,950,581 3D semiconductor device and structure, Issued March 16th, 2021.
US Patent 10,943,934 Multilevel semiconductor device and structure, Issued March 9th, 2021.
US Patent 10,930,608 3D semiconductor device and structure, Issued February 23rd, 2021.
US Patent 10,910,364 3D semiconductor device, Issued February 2th, 2021.
US Patent 10,903,089 3D semiconductor device and structure, Issued January 26th, 2021.
US Patent 10,896,931 3D semiconductor device and structure, Issued January 19th, 2021.
US Patent 10,892,169 3D semiconductor device and structure, Issued January 12th, 2021.
US Patent 10,892,016 3D memory semiconductor devices and structures, Issued January 12th, 2021.
US Patent 10,847,540 3D semiconductor memory device and structure, Issued November 24th, 2020.
US Patent 10,840,239 3D semiconductor device and structure, Issued November 17th, 2020.
US Patent 10,840,222 3D semiconductor device and structure, Issued November 17th, 2020.
US Patent 10,833,108 3D microdisplay device and structure, Issued November 10th, 2020.
US Patent 10,825,864 3D semiconductor device and structure, Issued November 3rd, 2020.
US Patent 10,825,799 3D semiconductor device and structure, Issued November 3rd, 2020.
US Patent 10,811,395 Method to form a 3D semiconductor device and structure, Issued October 20th, 2020.
US Patent 10,777,540 Semiconductor device and structure, Issued September 15th, 2020.
US Patent 10,679,977 3D microdisplay device and structure, Issued June 9th, 2020.
US Patent 10,665,695 3D semiconductor device with isolation layers, Issued May 26th, 2020.
US Patent 10,658,358 3D semiconductor wafer, devices, and structure, Issued May 19th, 2020.
US Patent 10,651,054 3D semiconductor device and structure, Issued May 12th, 2020.
US Patent 10,622,365 Semiconductor memory device and structure, Issued April 14th, 2020.
US Patent 10,600,888 3D semiconductor device, Issued March 24th, 2020.
US Patent 10,600,657 3D semiconductor device and structure, Issued March 24th, 2020.
US Patent 10,522,225 Semiconductor device with non-volatile memory, Issued December 31st, 2019.
US Patent 10,515,981 Multilevel semiconductor device and structure with memory, Issued December 24th, 2019.
US Patent 10,515,935 3D semiconductor device and structure, Issued December 24th, 2019.
US Patent 10,497,713 3D semiconductor memory device and structure, Issued December 3rd, 2019.
US Patent 10,418,369 Multi-level semiconductor memory device and structure, Issued September 17th, 2019.
US Patent 10,388,863 3D memory device and structure, Issued August 20th, 2019.
US Patent 10,388,568 3D semiconductor device and system, Issued August 20th, 2019.
US Patent 10,381,328 Semiconductor device and structure, Issued August 13th, 2019.
US Patent 10,366,970 3D semiconductor device and structure, Issued July 30th, 2019.
US Patent 10,355,121 3D semiconductor device with stacked memory, Issued July 16th, 2019.
US Patent 10,354,995 Semiconductor memory device and structure, Issued July 16th, 2019.
US Patent 10,325,651 3D semiconductor device with stacked memory, Issued June 18th, 2019.
US Patent 10,297,599 Semiconductor memory device and structure, Issued May 21st, 2019.
US Patent 10,297,586 Methods for processing a 3D semiconductor device, Issued May 21st, 2019.
US Patent 10,297,580 3D semiconductor device and structure, Issued May 21st, 2019.
US Patent 10,290,682 3D IC semiconductor device and structure with stacked memory, Issued May 14th, 2019.
US Patent 10,224,279 Semiconductor device and structure, Issued March 4th, 2019.
US Patent 10,217,667 3D semiconductor device, fabrication method and system, Issued February 26th, 2019.
US Patent 10,157,909 3D semiconductor device and structure, Issued December 18th, 2018.
US Patent 10,127,344 Automation for monolithic 3D devices, Issued November 13th, 2018.
US Patent 10,115,663 3D semiconductor device and structure, Issued October 30th, 2018.
US Patent 10,043,781 3D semiconductor device and structure, Issued August 7th, 2018.
US Patent 10,038,073 3D integrated circuit device, Issued July 31st, 2018.
US Patent 10,014,318 Semiconductor memory device, structure and methods, Issued July 3rd, 2018.
US Patent 10,014,292 3D Semiconductor device and structure, Issued July 3rd, 2018.
US Patent 10,014,282 3D Semiconductor device and structure, Issued July 3rd, 2018.
US Patent 10,002,865 3D semiconductor structure and device, Issued June 19th, 2018.
US Patent 9,954,080 3D integrated circuit device, Issued April 24th, 2018.
US Patent 9,953,994 Semiconductor memory device and structure, Issued April 24th, 2018.
US Patent 9,953,972 Semiconductor system, device and structure, Issued April 24th, 2018.
US Patent 9,953,925 Semiconductor system and device, Issued April 24th, 2018.
US Patent 9,953,870 3D semiconductor device and system, Issued April 24th, 2018.
US Patent 9,941,332 Semiconductor memory device and structure, Issued April 10th, 2018.
US Patent 9,941,319 Semiconductor and optoelectronic methods and devices, Issued April 10th, 2018.
US Patent 9,941,275 3D semiconductor device and structure, Issued April 10th, 2018.
US Patent 9,911,627 Method of processing a semiconductor device, Issued March 6th, 2018.
US Patent 9,892,972 3D semiconductor device and structure, Issued February 13th, 2018.
US Patent 9,887,203 3D semiconductor device and structure, Issued February 6th, 2018.
US Patent 9,871,034 Semiconductor device and structure, Issued January 16th, 2018.
US Patent 9,853,089 Semiconductor device and structure, Issued December 26th, 2017.
US Patent 9,818,800 Self aligned semiconductor device and structure, Issued November 14th, 2017.
US Patent 9,799,761 3DIC based system with memory cells and transistors, Issued October 24th, 2017.
US Patent 9,786,636 Semiconductor device and structure, Issued October 10th, 2017.
US Patent 9,721,927 Semiconductor device, structure and methods, Issued August 1st, 2017.
US Patent 9,711,407 Method of manufacturing a three dimensional integrated circuit by transfer of a mono-crystalline layer, Issued July 18th, 2017.
US Patent 9,691,869 Semiconductor devices and structures, Issued June 27th, 2017.
US Patent 9,691,760 Semiconductor device and structure, Issued June 27th, 2017.
US Patent 9,640,531 Semiconductor device, structure and methods, Issued May 2nd, 2017.
US Patent 9,613,887 Semiconductor system, device and structure, Issued April 4th, 2017.
US Patent 9,613,844 3D semiconductor device having two layers of transistors, Issued April 4th, 2017.
US Patent 9,577,642 Method to form a 3D semiconductor device, Issued February 21st, 2017.
US Patent 9,564,432 3D semiconductor device and structure, Issued February 7th, 2017.
US Patent 9,509,313 3D semiconductor device, Issued November 29th, 2016.
US Patent 9,496,271 3DIC system with a two stable state memory and back-bias region, Issued November 15th, 2016.
US Patent 9,460,991 Semiconductor device and structure, Issued October 4th, 2016.
US Patent 9,460,978 Semiconductor device and structure, Issued October 4th, 2016.
US Patent 9,419,031 Semiconductor and optoelectronic devices, Issued August 16th, 2016.
US Patent 9,412,645 Semiconductor devices and structures, Issued August 9th, 2016.
US Patent 9,406,670 System comprising a semiconductor device and structure, Issued August 2nd, 2016.
US Patent 9,385,088 3D semiconductor device and structure, Issued July 5th, 2016.
US Patent 9,385,058 Semiconductor device and structure, Issued July 5th, 2016.
US Patent 9,318,408 Semiconductor device and structure, Issued April 19th, 2016.
US Patent 9,305,867 Semiconductor devices and structures, Issued April 5th, 2016.
US Patent 9,299,641 Semiconductor system, device and structure with heat removal, Issued March 29th, 2016.
US Patent 9,252,134 Semiconductor device and structure, Issued February 2nd, 2016.
US Patent 9,219,005 Semiconductor system and device, Issued December 22nd, 2015.
US Patent 9,197,804 Semiconductor and optoelectronic devices, Issued November 24th, 2015.
US Patent 9,142,553 Semiconductor device and structure, Issued on September 22nd, 2015.
US Patent 9,136,153 3D semiconductor device and structure with back-bias, Issued on September 15th, 2015.
US Patent 9,117,749 Semiconductor device and structure, Issued on August 25th, 2015.
US Patent 9,099,526 Integrated circuit device and structure, Issued on August 4th, 2015.
US Patent 9,099,424 Semiconductor system, device and structure with heat removal, Issued on August 4th, 2015.
US Patent 9,030,858 Semiconductor device and structure, Issued on May 12th, 2015.
US Patent 9,029,173 Method for fabrication of a semiconductor device and structure, Issued May 12th, 2015.
US Patent 9,023,688 Method of processing a semiconductor device, May 5th, 2015.
US Patent 9,000,557 Semiconductor device and structure, Issued April 7th, 2015.
US Patent 9,021,414 Automation for monolithic 3D device, Issued April 28th, 2015.
US Patent 8,994,404 Semiconductor device and structure, Issued March 31st, 2015.
US Patent 8,993,385 Method to construct a 3D semiconductor device, Issued March 31st, 2015.
US Patent 8,987,079 Method for developing a custom device, Issued March 24th, 2015.
US Patent 8,975,670 Semiconductor device and structure for heat removal, Issued March 10th, 2015.
US Patent 8,956,959 Method of manufacturing a semiconductor device with two monocrystalline layers, Issued February 17th, 2015.
US Patent 8,921,970 Semiconductor device and structure, Issued December 30th, 2014.
US Patent 8,912,052 Semiconductor device and structure, Issued December 16th, 2014.
US Patent 8,907,442 System comprising a semiconductor device and structure, Issued December 9th, 2014
US Patent 8,902,663 Method of maintaining a memory state, Issued December 2nd, 2014.
US Patent 8,901,613 Semiconductor device and structure for heat removal, Issued December 2nd, 2014.
US Patent 8,846,463 Method to construct a 3D semiconductor device, Issued September 30th, 2014.
US Patent 8,836,073 Semiconductor device and structure, Issued September 16th, 2014.
US Patent 8,823,122 Semiconductor and optoelectronic devices, September 2nd, 2014.
US Patent 8,803,206 3D semiconductor device and structure, August 12th, 2014.
US Patent 8,754,533 Monolithic three-dimensional semiconductor device and structure, June 17th, 2014.
US Patent 8,753,913 Method for fabricating novel semiconductor and optoelectronic devices, June 17th, 2014.
US Patent 8,742,476 Semiconductor device and structure, June 3rd, 2014.
US Patent 8,709,880 Method for fabrication of a semiconductor device and structure, April 29th, 2014.
US Patent 8,703,597 Method for fabrication of a semiconductor device and structure, April 22nd, 2014.
US Patent 8,686,428 Semiconductor device and structure, April 1st, 2014.
US Patent 8,687,399 Semiconductor device and structure, April 1st, 2014.
US Patent 8,674,470 Semiconductor device and structure, March 18th, 2014.
US Patent 8,669,778 Method for design and manufacturing of a 3D semiconductor device, March 11th, 2014.
US Patent 8,664,042 Method for fabrication of configurable systems, March 4th, 2014.
US Patent 8,642,416 Method of forming three dimensional integrated circuit devices using layer transfer technique, February 4, 2014.
US Patent 8,581,349 3D memory semiconductor device and structure, November 12th, 2013.
US Patent 8,574,929 Method to form a 3D semiconductor device and structure, November 5, 2013.
US Patent 8,557,632 Method for fabrication of a semiconductor device and structure, October 15th, 2013.
US Patent 8,541,819 Semiconductor device and structure, Issued September 24th, 2013
US Patent 8,536,023 Method of manufacturing a semiconductor device and structure, Issued September 17, 2013
US Patent 8,492,886 3D integrated circuit with logic, Issued July 23rd, 2013.
US Patent 8,476,145 Method of fabricating a semiconductor device and structure, Issued July 2, 2013
US Patent 8,461,035 Method for fabrication of a semiconductor device and structure, Issued June 11, 2013
US Patent 8,450,804 Semiconductor device and structure for heat removal, Issued May 28th, 2013
US Patent 8,440,542 Semiconductor device and structure, Issued May 14th, 2013
US Patent 8,427,200 3D semiconductor device, Issued April 23rd, 2013
US Patent 8,405,420 System comprising a semiconductor device and structure, Issued March 26, 2013
US Patent 8,395,191 Semiconductor device and structure, Issued March 12, 2013
US Patent 8,384,426 Semiconductor device and structure, Issued February 26, 2013
US Patent 8,379,458 Semiconductor device and structure , Issued February 19, 2013
US Patent 8,378,715 Method to construct systems, Issued February 19, 2013
US Patent 8,378,494 Method for fabrication of a semiconductor device and structure, Issued February 19, 2013
US Patent 8,373,439 3D semiconductor device, Issued February 12, 2013
US Patent 8,373,230 Method for fabrication of a semiconductor device and structure, Issued February 12, 2013
US Patent 8,362,800 3D semiconductor device including field repairable logics, Issued January 29, 2013
US Patent 8,362,482 Semiconductor Device and structure, Issued January 29, 2013
US Patent 8,298,875 Method for fabrication of a semiconductor device and structure, Issued October 30, 2012
US Patent 8,294,159 Method for fabrication of a semiconductor device and structure, Issued October 23, 2012
US Patent 8,283,215 Semiconductor and optoelectronic devices, Issued October 9, 2012
US Patent 8,273,610 Method of constructing a semiconductor device and structure, Issued September 25, 2012
US Patent 8,258,810 3D semiconductor device, Issued September 4, 2012
US Patent 8,237,228 System comprising a semiconductor device and structure, Issued August 7, 2012
US Patent 8,203,148 Semiconductor device and structure, Issued June 19, 2012
US Patent 8,163,581 Semiconductor and optoelectronic devices, Issued April 24, 2012
US Patent 8,153,499 Method for fabrication of a semiconductor device and structure, Issued April 10, 2012
US Patent 8,148,728 Method for fabrication of a semiconductor device and structure, Issued April 3, 2012
US Patent 8,115,511 Method for fabrication of a semiconductor device and structure, Issued February 14, 2012
US Patent 8,114,757 Semiconductor device and structure, Issued February 14, 2012
US Patent 8,058,137 Method for fabrication of a semiconductor device and structure, Issued November 15, 2011
US Patent 8,026,521 Semiconductor device and structure, Issued September 27, 2011
US Patent 7,986,042 Method for fabrication of a semiconductor device and structure, Issued July 26, 2011
US Patent 7,960,242 Method for fabrication of a semiconductor device and structure, Issued June 14, 2011
US Patent 7,964,916 Method for fabrication of a semiconductor device and structure, Issued June 21, 2011

11,342,214