Others work relevant to monolithic 3D IC
- What is 3DIC Technology? – How Does it Work?, Synopsys.
- Events Organized by IEEE SSCS Romania Chapter, IEEE Solid-State Circuits Magazine, November 17th, 2021.
- Transistors Will Stop Shrinking in 2021, Moore’s Law Roadmap Predicts, By Rachel Courtland, July 22, 2016.
- Leti Extends Collaboration With Qualcomm On CoolCube 3D Integration Technology, April 12, 2016
- Stanford-led skyscraper-style chip design boosts electronic performance by factor of a thousand, Stanford Report, December 9, 2015.
- Moore's Law at 50: Are we planning for retirement?, IEDM Conference,Plenary talk: Greg Yeric, ARM Research Fellow, December 7, 2015.
- "Silicon Wafer Bonding Technology for VLSI and MEMS applications", The ELTRAN (SOI-Epi WaferTM) Technology, Takao Yonehara.
- Monolithic 3D processing using non-equilibrium RTP, By Ed Korczynski, Senior Technical Editor, Solid State Technology, April 17, 2015.
- From 2D to Monolithic 3D: Design Possibilities, Expectations and Challenges, Oliver Billoint, LETI, 2015.
- 3D VLSI: Next Generation 3D Integration Technology, by Karim Arabi, VP of Qualcomm, at 2015 ISPD.
- 3D Qualcomm SoCs by 2016, EE Times Article by R. Colin Johnson, March 31st, 2015.
- Memory leads the way to better computing, H.-S. Philip Wong and Sayeef Salahuddin, March 17th, 2015.
- 3D stacking offers an extension for Moore's Law, E&T Magazine by Chris Edwards, February 16th, 2015.
- Leti Devices Workshop, Leti San Francisco, December 14th, 2014.
- True 3-D Chip Harness Nanotubes, EE Times Article by R. Colin Johnson, December 19th, 2014.
- Novel Low Temperature 3D Wafer Stacking Technology for High Density Device Integration, by Dr. Ionut Radu, Soitec, Bucharest 2013.
- Going Up! Monolithic 3D As An Alternative to CMOS Scaling, by Jean-Eric Michallet, Hughes Metras and Perrine Batude (CEA-Leti), April 9th, 2014.
- Rise of the Monolithic 3D Chip, IEEE Spectrum, February 24th, 2014.
- CMOS technologies: Our most power efficient solution today and our vision toward 10nm node and beyond, Leti Devices Workshop, December 8, 2013
- High-Density Integration of Functional Modules Using Monolithic 3D-IC Technology, Dept. of Electrical and Computer Engineering, Georgia Tech, Atlanta GA, USA and Qualcomm Research, San Diego, CA, USA
- Low Power Design, Past and Future (monolithic 3D), By Bob Brodersen (UCB), Anantha Chandrakasan (MIT) and Dejan Markovic (UCLA).
- Cramming more components onto integrated circuits, By Gordon E. Moore.
- Monolithic 3D chip fabricated without TSVs, Solid State Technology blog post.
- New 3D Approaches: Enabling Technologies for Nanoelectronic Devices, Soitec at CEA-LETI 15thAnnual Review
- 3D-IC Integration (CMP 3D IC presentation)
- Helping Flash Memory Grow Up: Etch Technology For The Terabit Era (The Applied Materials Blog)
- CMP 3D-IC Integration (Cirsuit's Multi Projects Webpage) .
- Monolithic 3D-ICs with single grain Si thin film transistors (Solid State Electronics An International Journal)
- Cost Efficient Wafer-Level Stacking Technologies (Chip Scale Review - Digital Edition - January - February 2013, pg. 26-30)
- Building block for wafer-level 3D Integration (Solid State Technology Magazine)
- Michio Kaku: Tweaking Moore’s Law (Video)
- 3-D Hyperintegration and Packaging Technologies for Micro-Nano Systems, Jian-Qiang Lu, Proceedings of the IEEE | Vol. 97, No. 1, January 2009.
Papers and Presentations
- Chapter 11, 3D for Efficient FPGA, Zvi Or-Bach, June 2020.
- Modified ELTRAN® - A Game Changer for Monolithic 3D, Zvi Or-Bach, Brian Cronquist, Zeev Wurman, Israel Beinglass, and Albert K. Henning, October 2015.
- MonolithIC 3D – The Most Effective Path for Future IC Scaling, MonolithIC 3D Inc., October 2015.
- CHIPS 2020 VOL. 2: New Vistas in Nanoelectronics - Chapter "Monolithic 3D Integration", page 51-91, Zvi Or-Bach, October 2015.
- "Monolithic 3D Advantage", Free E-book, November 2014.
- Precision Bonders - A Game Changer for Monolithic 3D, IEEE S3S 2014, October 2014.
- Monolithic 3D Integrated Circuits, NCCAVS Joint User Group Meeting, June 12, 2014
- A disruptor to the semiconductor industry The Monolithic 3D IC, ITHERM 2014, May 2014.
- Monolithic 3D Integrated Circuits - Zvi Or-Bach Technion Lecture, Israel, March 2014 (video lecture).
- "Der Ausweg aus dem Skalierungs-Dilemma?", Electronic Information, Germany, January 2014.
- "THE MONOLITHIC 3D-IC", Slide Presentation at the 2013 S3S Conference, October 2013.
- "Practical Process Flows for Monolithic 3D", 3D Plenary Talk held at the 2013 S3S Conference, October 2013.
- "The Monolithic 3D Advantage", Tutorial presented at the 2013 IEEE 3DIC Conference, October 2013.
- "Thermal Considerations for Monolithic Integration of Three-Dimensional Integrated Circuits", Poster presented at the 2013 S3S Conference, October 2013.
- "Pulsed Laser Annealing: A scalable and practical technology for monolithic 3D IC", Paper presented at the 2013 IEEE 3DIC Conference, October 2013.
- "MonolithIC 3D™ - the Future of Semiconductor Scaling", Presentation at Semicon West 2013 - SIF, July 2013.
- "Monolithic 3D Memory - NAND Flash, DRAM and R-RAM", Free E-book, March 2013.
- "Monolithic 3D - In General", Free E-book, March 2013.
- "Monolithic 3D Advantage", Free E-book, February 2013
- "The Monolithic 3D Advantage", Paper, January 2013
- "Cooling Three-Dimensional Integrated Circuits using Power Delivery Networks", Paper at the IEDM Conference, Dec 2012 (paper) (slides).
- "Monolithic 3D Integrated Circuits", Guest Lecture at Technion City, January 1st, 2013
- "The First Step to Take When You Consider Taking Your Scientific Breakthrough to Startup", Guest Lecture at Technion City, January 1st, 2013
- MonolithIC 3D-ICs RCAT, HKMG , RCJLT and 3D Embedded eDRAM Approach, MonolithIC 3D Inc., Free E-book, December 2012
- "The Short, Medium and Long-Term Path to the 3D Ecosystem", Panel Discussion at EDPS, April 5th, 2012
- "Monolithic 3D-ICs with Single Crystal Silicon Layers", Invited paper at the IEEE 3DIC conference, 2012 (paper) (slides)
- "Fine-Grained 3D Integration", Invited talk at the IEEE Components, Packaging and Manufacturing Technology (CPMT) Society, January 11, 2012
- "Monolithic 3D - The effective alternative to Dimensional Scaling", Invited lecture at the Technion - Israel Institute of Technology, November 21, 2011
- "3D: Where are we today; Where are we going; and How will you get there with us?", Invited talk at the 9th International System-on-Chip (SoC) Conference, Exhibit & Workshops in Southern California, November 2-3, 2011
- "Monolithic 3D-ICs: The Effective Alternative to Dimensional Scaling", Invited keynote speech at the Intl. Electronics Forum in Seville, October 7, 2011
- "Resistive RAM: Technology and Market Applications", Invited Talk at the University of California, Berkeley, September 2011
- "Monolithic 3D Integrated Circuits", Invited Talk at Intel Research (Photonics Technology Lab), July 2011
- "Monolithic 3D Integrated Circuits", Invited Talk at the CMOS Emerging Technologies Workshop, June 2011
- "Monolithic 3D DRAM Technology", Invited Talk at the American Vacuum Society Workshop on 3D Packaging, June 2011
- "The Monolithic 3D-IC", Invited Talk at the 3D Workshop at the Intl. Conference on Technology & Instrumentation in Particle Physics, June 2011
- "Monolithic 3D FPGAs", Invited Talk at the Intl. Memory Workshop, May 2011
- "Monolithic 3D Integrated Circuits", Invited Talk at the Technical University of Munich, May 2011
- "Monolithic 3D Integrated Circuits", appears in Issue #37 of Future-Fab International, April 2011
- "Monolithic 3D Technology: Nu3D-IC, A Semiconductor Industry Game Changer", Invited Presentation at the 3D-ASIP Conference, Dec 2010.
- "Resistive RAM: Technology and Market Applications", Invited Presentation at the IEEE-SCV Electron Devices Society, Nov 2010.
- "3D-FPGA: The Path to ASIC-like Density, Power and Performance", Invited Presentation at the Applied Materials 3D Interconnect Symposium, Jan 2010.
Patents
Only issued patents are listed below. We have 350+ patents pending at the US Patent Office.
- US Patent 12,094,965 3D Semiconductor Device And Structure With Metal Layers And Memory Cells, Issued September 17th, 2024.
- US Patent 12,094,892 3D Micro Display Device And Structure, Issued September 17th, 2024.
- US Patent 12,094,829 3D Semiconductor Device And Structure, Issued September 17th, 2024.
- US Patent 12,093,628 Automation Methods For 3D Integrated Circuits And Devices, Issued September 17th, 2024.
- US Patent 12,080,743 Multilevel Semiconductor Device And Structure With Image Sensors And Wafer Bonding, Issued September 3rd, 2024.
- US Patent 12,080,630 3D Semiconductor Device And Structure With Metal Layers And A Connective Path, Issued September 3rd, 2024.
- US Patent 12,068,187 3D Semiconductor Device And Structure With Bonding And DRAM Memory Cells, Issued August 20th, 2024.
- US Patent 12,051,674 3D Semiconductor Device And Structure With Metal Layers, Issued July 30th, 2024.
- US Patent 12,041,792 3D Memory Semiconductor Devices And Structures With Memory Cells Preliminary Class, Issued July 16th, 2024.
- US Patent 12,041,791 3D Memory Devices And Structures With Memory Arrays And Metal Layers, Issued July 16th, 2024.
- US Patent 12,035,531 3D Semiconductor Device And Structure With Logic And Memory, Issued July 9th, 2024.
- US Patent 12,033,884 Methods For Producing A 3D Semiconductor Device And Structure With Memory Cells And Multiple Metal Layers, Issued July 9th, 2024.
- US Patent 12,029,050 3D Semiconductor Device, Structure And Methods With Connectivity Structures, Issued July 2nd, 2024.
- US Patent 12,027,518 3D Semiconductor Devices And Structures With Metal Layers, Issued July 2nd, 2024.
- US Patent 12,021,067 3D Semiconductor Device, Structure And Methods With Connectivity Structures, Issued June 25th, 2024.
- US Patent 12,021,028 3D Semiconductor Devices And Structures With Electronic Circuit Units, Issued June 25th, 2024.
- US Patent 12,016,181 3D Semiconductor Device And Structure With Logic And Memory, Issued June 18th, 2024.
- US Patent 11,991,884 3D Semiconductor Device And Structure With Logic And Memory, Issued May 21st, 2024.
- US Patent 11,990,462 3D Semiconductor Device And Structure With Metal Layers, Issued May 21st, 2024.
- US Patent 11,984,445 3D Semiconductor Devices And Structures With Metal Layers, Issued May 14th, 2024.
- US Patent 11,984,438 Multilevel Semiconductor Device And Structure With Oxide Bonding, Issued May 14th, 2024.
- US Patent 11,978,731 Method To Produce A Multi-level Semiconductor Memory Device And Structure, Issued May 7th, 2024.
- US Patent 11,967,583 3D Semiconductor Device And Structure With Metal Layers, Issued April 23rd, 2024.
- US Patent 11,963,373 3D Memory Semiconductor Devices And Structures With Memory-line Pillars, Issued April 16th, 2024.
- US Patent 11,961,827 3D Semiconductor Device And Structure With Metal Layers, Issued April 16th, 2024.
- US Patent 11,956,976 3D Semiconductor Devices And Structures With Transistors, Issued April 9th, 2024.
- US Patent 11,956,952 Semiconductor Memory Device And Structure, Issued April 9th, 2024.
- US Patent 11,937,422 Semiconductor Memory Device And Structure, Issued March 19th, 2024.
- US Patent 11,935,949 3D Semiconductor Device And Structure With Metal Layers And Memory Cells, Issued March 19th, 2024.
- US Patent 11,930,648 3D Memory Devices And Structures With Metal Layers, Issued March 12th, 2024.
- US Patent 11,929,372 Multilevel Semiconductor Device And Structure With Image Sensors And Wafer Bonding, Issued March 12th, 2024.
- US Patent 11,923,374 3D Semiconductor Device And Structure With Metal Layers, Issued March 5th, 2024.
- US Patent 11,923,230 3D Semiconductor Device And Structure With Bonding, Issued March 5th, 2024.
- US Patent 11,916,045 3D Semiconductor Device And Structure With Metal Layers, Issued February 27th, 2024.
- US Patent 11,910,622 3D Memory Semiconductor Devices And Structures With Bit-line Pillars, Issued February 20th, 2024.
- US Patent 11,908,839 3D Semiconductor Device, Structure And Methods With Connectivity Structures, Issued February 20th, 2024.
- US Patent 11,901,210 3D Semiconductor Device And Structure With Memory, Issued February 13th, 2024.
- US Patent 11,881,443 3D Semiconductor Device And Structure With Metal Layers And A Connective Path, Issued January 23rd, 2024.
- US Patent 11,876,011 3D Semiconductor Device And Structure With Single-crystal Layers, Issued January 1th, 2024.
- US Patent 11,869,965 3D Semiconductor Device And Structure With Metal Layers And Memory Cells, Issued January 9th, 2024.
- US Patent 11,869,915 Multilevel Semiconductor Device And Structure With Image Sensors And Wafer Bonding, Issued January 9th, 2024.
- US Patent 11,869,591 3D Memory Devices And Structures With Control Circuits, Issued January 9th, 2024.
- US Patent 11,862,503 Method For Producing A 3D Semiconductor Device And Structure With Memory Cells And Multiple Metal Layers, Issued January 2nd, 2024.
- US Patent 11,855,114 Multilevel Semiconductor Device And Structure With Image Sensors And Wafer Bonding , Issued December 26th, 2023.
- US Patent 11,855,100 Multilevel Semiconductor Device And Structure With Oxide Bonding, Issued December 26th, 2023.
- US Patent 11,854,857 Methods For Producing A 3D Semiconductor Device And Structure With Memory Cells And Multiple Metal Layers, Issued December 26th, 2023.
- US Patent 11,854,646 3D Memory Semiconductor Devices And Structures With Bit-line Pillars, Issued December 26th, 2023.
- US Patent 11,830,757 3D Semiconductor Device And Structure With Bonding, Issued November 28th, 2023.
- US Patent 11,812,620 3D DRAM Memory Devices And Structures With Control Circuits, Issued November 7th, 2023.
- US Patent 11,804,396 Methods For Producing A 3D Semiconductor Device And Structure With Memory Cells And Multiple Metal Layers, Issued October 31st, 2023.
- US Patent 11,800,725 3D Semiconductor Devices And Structures With Electronic Circuit Units, Issued October 24th, 2023.
- US Patent 11,793,005 3D Semiconductor Devices And Structures, Issued October 17th, 2023.
- US Patent 11,791,222 3D Semiconductor Device And Structure, Issued October 17th, 2023.
- US Patent 11,784,169 3D Semiconductor Device And Structure With Metal Layers, Issued October 10th, 2023.
- US Patent 11,784,082 3D Semiconductor Device And Structure With Bonding, Issued October 10th, 2023.
- US Patent 11,763,864 3D Memory Semiconductor Devices And Structures With Bit-line Pillars, Issued September 19th, 2023.
- US Patent 11,757,030 3D Semiconductor Device And Structure With Oxide Bonding, Issued September 12th, 2023.
- US Patent 11,756,822 3D Semiconductor Device And Structure Including Power Distribution Grids, Issued September 12th, 2023.
- US Patent 11,735,501 3D Semiconductor Device And Structure With Metal Layers And A Connective Path, Issued August 22nd,2023.
- US Patent 11,735,462 3D Semiconductor Device And Structure With Single-crystal Layers, Issued August 22nd, 2023.
- US Patent 11,720,736 Automation Methods For 3D Integrated Circuits And Devices, Issued August 8th, 2023.
- US Patent 11,711,928 3D Memory Devices And Structures With Control Circuits, Issued July 25th, 2023.
- US Patent 11,694,944 3D Semiconductor Device And Structure With Metal Layers And A Connective Path, Issued July 4th, 2023.
- US Patent 11,694,922 Multilevel Semiconductor Device And Structure With Oxide Bonding, Issued July 4th, 2023.
- US Patent 11,682,683 3D Micro Display Device And Structure, Issued June 20th, 2023.
- US Patent 11,677,021 3D Semiconductor Device And Structure With Memory, Issued June 13th, 2023.
- US Patent 11,676,945 3D Semiconductor Device And Structure With Metal Layers, Issued June 13th, 2023.
- US Patent 11,670,536 3D Semiconductor Device And Structure Including Power Distribution Grids, Issued June 6th, 2023.
- US Patent 11,646,309 3D Semiconductor Devices And Structures With Metal Layers, Issued May 9th, 2023.
- US Patent 11,631,667 3D Semiconductor Device And Structure, Issued April 18th, 2023.
- US Patent 11,621,249 3D Semiconductor Device And Structure, Issued April 4th, 2023.
- US Patent 11,621,240 3D Memory Devices And Structures With Control Circuits, Issued April 4th, 2023.
- US Patent 11,616,004 3D Semiconductor Device And Structure With Metal Layers And A Connective Path, Issued March 28th, 2023.
- US Patent 11,615,977 3D Semiconductor Memory Device And Structure, Issued March 28th, 2023.
- US Patent 11,615,228 Automation Methods For 3D Integrated Circuits And Devices, Issued March 28th, 2023.
- US Patent 11,610,802 Method For Producing A 3D Semiconductor Device And Structure With Single Crystal Transistors And Metal Gate Electrodes, Issued March 21st, 2023.
- US Patent 11,605,663 Multilevel Semiconductor Device And Structure With Image Sensors And Wafer Bonding, Issued March 14th, 2023.
- US Patent 11,605,630 3D Integrated Circuit Device And Structure With Hybrid Bonding, Issued March 14th, 2023.
- US Patent 11,605,616 3D Semiconductor Device And Structure With Metal Layers, Issued March 14th,2023
- US Patent 11,600,667 Method To Produce 3D Semiconductor Devices And Structures With Memory, Issued March 7th, 2023.
- US Patent 11,600,586 3D Semiconductor Devices And Structures With Electronic Circuit Units, Issued March 7th, 2023.
- US Patent 11,594,526 Multilevel Semiconductor Device And Structure With Oxide Bonding, Issued February 28th, 2023.
- US Patent 11,594,473 3D Semiconductor Device And Structure With Metal Layers And A Connective Path, Issued February 28th, 2023.
- US Patent 11,575,038 3D Semiconductor Device And Structure With Memory, Issued February 7th, 2023.
- US Patent 11,574,818 Method For Producing A 3D Semiconductor Device And Structure Including Power Distribution Grids, Issued February 7th, 2023.
- US Patent 11,574,109 Automation Methods For 3D Integrated Circuits And Devices, Issued February 7th, 2023.
- US Patent 11,569,117 3D Semiconductor Device And Structure With Single-crystal Layers, Issued January 31st, 2023.
- US Patent 11,532,599 3D Semiconductor Device And Structure With Metal Layers, Issued December 20th, 2022.
- US Patent 11,527,416 Method For Producing A 3D Semiconductor Device And Structure Including Metal Layers, Issued December 13th, 2022.
- US Patent 11,521,888 3D Semiconductor Device And Structure With High-k Metal Gate Transistors, Issued December 6th, 2022.
- US Patent 11,515,413 3D Semiconductor Device And Structure With Memory, Issued November 29th, 2022.
- US Patent 11,514,221 Automation For Monolithic 3D Devices, Issued November 29th, 2022.
- US Patent 11,508,605 3D Semiconductor Memory Device And Structure, Issued November 22nd, 2022.
- US Patent 11,502,095 3D Semiconductor Device, Structure And Methods, Issued November 15th, 2022.
- US Patent 11,495,484 3D Semiconductor Devices And Structures With At Least Two Single-crystal Layers, Issued November 8th, 2022.
- US Patent 11,488,997 Multilevel Semiconductor Device And Structure With Image Sensors And Wafer Bonding, Issued November 1st, 2022.
- US Patent 11,488,939 3D Semiconductor Devices And Structures With At Least One Vertical Bus, Issued November 1st, 2022.
- US Patent 11,487,928 Automation For Monolithic 3D Devices, Issued November 1st, 2022.
- US Patent 11,482,541 3D Memory Devices And Structures With Multiple Memory Levels, Issued October 25th, 2022.
- US Patent 11,482,540 3D Memory Semiconductor Devices And Structures With Bit-line Pillars, Issued October 25th, 2022.
- US Patent 11,482,494 3D Semiconductor Device And Structure, Issued October 25th, 2022.
- US Patent 11,482,440 3D Semiconductor Device And Structure With A Built-in Test Circuit For Repairing Faulty Circuits, Issued October 25th, 2022.
- US Patent 11,482,439 Methods For Producing A 3D Semiconductor Memory Device Comprising Charge Trap Junction-less Transistors, Issued October 25th, 2022.
- US Patent 11,482,438 Methods For Producing A 3D Semiconductor Memory Device And Structure, Issued October 25th, 2022.
- US Patent 11,476,181 3D Semiconductor Device And Structure With Metal Layers, Issued October 18th, 2022.
- US Patent 11,469,271 Method To Produce 3D Semiconductor Devices And Structures With Memory, Issued October 11th, 2022.
- US Patent 11,462,586 Method To Produce 3D Semiconductor Devices And Structures With Memory, Issued October 4th, 2022.
- US Patent 11,450,646 3D Semiconductor Device And Structure With Metal Layers, Issued September 20th, 2022.
- US Patent 11,443,971 3D semiconductor device and structure with memory, Issued September 13th, 2022.
- US Patent 11,437,368 Multilevel semiconductor device and structure with oxide bonding, Issued September 6th, 2022.
- US Patent 11,430,668 3D semiconductor device and structure with bonding, Issued August 30th, 2022.
- US Patent 11,430,667 3D semiconductor device and structure with bonding, Issued August 30th, 2022.
- US Patent 11,424,222 3D semiconductor device and structure with metal layers, Issued August 23rd, 2022.
- US Patent 11,410,912 3D semiconductor device with vias and isolation layers, Issued August 9th, 2022.
- US Patent 11,404,466 Multilevel semiconductor device and structure with image sensors, Issued August 2nd, 2022.
- US Patent 11,398,569 3D semiconductor device and structure, Issued July 26th, 2022.
- US Patent 11,374,118 Method to form a 3D integrated circuit, Issued June 28th, 2022.
- US Patent 11,374,042 3D micro display semiconductor device and structure, Issued June 28th, 2022
- US Patent 11,355,381 3D semiconductor memory device and structure, Issued June 7th, 2022
- US Patent 11,355,380 Methods for producing 3D semiconductor memory device and structure utilizing alignment marks, Issued June 7th, 2022.
- US Patent 11,342,214 Methods for producing a 3D semiconductor memory device and structure, Issued May 24th, 2022.
- US Patent 11,341,309 Automation for monolithic 3D devices, Issued May 24th, 2022.
- US Patent 11,335,731 3D semiconductor device and structure with transistors, Issued May 17th, 2022.
- US Patent 11,329,059 3D memory devices and structures with thinned single crystal substrates, Issued May 10th, 2022.
- US Patent 11,327,227 Multilevel semiconductor device and structure with electromagnetic modulators, Issued May 10th, 2022.
- US Patent 11,315,980 3D semiconductor device and structure with transistors, Issued April 26th, 2022.
- US Patent 11,315,965 3D micro display semiconductor device and structure, Issued April 26th, 2022.
- US Patent 11,309,292 3D semiconductor device and structure with metal layers, Issued April 19th, 2022.
- US Patent 11,296,115 3D semiconductor device and structure, Issued April 5th, 2022.
- US Patent 11,296,106 3D memory semiconductor devices and structures, Issued April 5th, 2022.
- US Patent 11,276,687 3D semiconductor device and structure, Issued March 15th, 2022.
- US Patent 11,270,988 3D semiconductor device(s) and structure(s) with electronic control units, Issued March 8th, 2022.
- US Patent 11,270,055 Automation for monolithic 3D devices, Issued March 8th, 2022.
- US Patent 11,257,867 3D semiconductor device and structure with oxide bonds, Issued February 22nd, 2022.
- US Patent 11,257,689 3D semiconductor device and structure, Issued February 22nd, 2022.
- US Patent 11,251,149 3D memory device and structure, Issued February 15th, 2022.
- US Patent 11,233,069 3D semiconductor device and structure, Issued January 25th, 2022.
- US Patent 11,227,897 Method for producing a 3D semiconductor memory device and structure, Issued January 18th, 2022.
- US Patent 11,217,565 Method to form a 3D semiconductor device and structure, Issued January 4th, 2022.
- US Patent 11,217,472 3D semiconductor device and structure with multiple isolation layers, Issued January 4th, 2022.
- US Patent 11,211,279 Method for processing a 3D integrated circuit and structure, Issued December 28th, 2021.
- US Patent 11,205,034 Automation for monolithic 3D devices, Issued December 21st, 2021.
- US Patent 11,177,140 3D semiconductor device and structure, Issued November 16th, 2021.
- US Patent 11,164,898 Multilevel semiconductor device and structure, Issued November 2nd, 2021.
- US Patent 11,164,811 3D semiconductor device with isolation layers and oxide-to-oxide bonding, Issued November 2nd, 2021.
- US Patent 11,164,770 Method for producing a 3D semiconductor memory device and structure, Issued November 2nd, 2021.
- US Patent 11,163,112 Multilevel semiconductor device and structure with electromagnetic modulators, Issued November 2nd, 2021.
- US Patent 11,158,674 Method to produce a 3D semiconductor device and structure, Issued October 26th, 2021.
- US Patent 11,158,652 3D memory semiconductor devices and structure, Issued October 26th, 2021.
- US Patent 11,158,598 Method to construct 3D devices and system, Issued October 26th, 2021.
- US Patent 11,152,386 3D semiconductor device and structure, Issued October 19th, 2021.
- US Patent 11,145,657 3D semiconductor device and structure, Issued October 12th, 2021.
- US Patent 11,133,351 3D semiconductor device and structure, Issued September 28th, 2021.
- US Patent 11,133,344 Multilevel semiconductor device and structure with image sensors, Issued September 28th, 2021.
- US Patent 11,121,246 3D semiconductor device and structure with memory, Issued September 14th, 2021.
- US Patent 11,121,121 3D semiconductor device and structure, Issued September 14th, 2021.
- US Patent 11,121,021 3D semiconductor device and structure, Issued September 14th, 2021.
- US Patent 11,114,464 3D semiconductor device and structure, Issued September 7th, 2021.
- US Patent 11,114,427 3D semiconductor processor and memory device and structure, Issued September 7th, 2021
- US Patent 11,107,808 3D semiconductor device and structure, Issued August 31st, 2021.
- US Patent 11,107,803 Method to construct 3D devices and systems, Issued August 31st, 2021.
- US Patent 11,107,721 3D semiconductor device and structure with NAND logic, Issued August 31st, 2021.
- US Patent 11,106,853 Automation for monolithic 3D devices, Issued August 31st, 2021.
- US Patent 11,101,266 3D device and devices with bonding, Issued August 24th, 2021.
- US Patent 11,094,576 Methods for producing a 3D semiconductor memory device and structure, Issued August 17th, 2021.
- US Patent 11,088,130 3D semiconductor device and structure, Issued August 10th, 2021.
- US Patent 11,088,050 3D semiconductor device with isolation layers, Issued August 10th, 2021.
- US Patent 11,087,995 3D semiconductor device and structure, Issued August 10th, 2021.
- US Patent 11,069,697 3D memory semiconductor devices and structures, Issued July 20th, 2021.
- US Patent 11,063,071 Multilevel semiconductor device and structure with waveguides, Issued July 13th, 2021.
- US Patent 11,063,024 Method to form a 3D semiconductor device and structure, Issued July 13th, 2021.
- US Patent 11,056,468 3D semiconductor device and structure, Issued July 6th, 2021.
- US Patent 11,043,523 Multilevel semiconductor device and structure with image sensor, Issued June 22nd, 2021.
- US Patent 11,031,394 3D semiconductor device and structure, Issued June 8th, 2021.
- US Patent 11,031,275 3D semiconductor device and structure with memory, Issued June 8th, 2021.
- US Patent 11,030,371 Automation for monolithic 3D devices, Issued June 8th, 2021.
- US Patent 11,024,673 3D semiconductor device and structure, Issued June 1st, 2021.
- US Patent 11,018,191 3D semiconductor device and structure, Issued May 25th, 2021.
- US Patent 11,018,156 3D memory semiconductor devices and structures, Issued May 25th, 2021.
- US Patent 11,018,133 3D integrated circuit, Issued May 25th, 2021.
- US Patent 11,018,116 Method to form a 3D semiconductor device and structure, Issued May 25th, 2021.
- US Patent 11,018,042 3D semiconductor memory device and structure, Issued May 25th, 2021.
- US Patent 11,011,507 3D semiconductor device and structure, Issued May 18th, 2021
- US Patent 11,004,967 3D semiconductor device and structure with memory, Issued May 11th, 2021.
- US Patent 11,004,719 Methods for producing a 3D semiconductor memory device and structure, Issued May 11th, 2021.
- US Patent 11,004,694 3D semiconductor device and structure, Issued May 11th, 2021.
- US Patent 10,998,374 Multilevel semiconductor device and structure, Issued May 4th, 2021.
- US Patent 10,991,675 3D semiconductor device and structure, Issued April 27th, 2021.
- US Patent 10,978,501 Multilevel semiconductor device and structure with waveguides, Issued April 13th, 2021.
- US Patent 10,964,807 3D semiconductor device with memory, Issued March 30th, 2021.
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