Monolithic 3D High Performance (HKMG) Transistors

Follow link for presentation on: Detailed HKMG flow.
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Technology

The monolithic 3D IC technology is applied to produce monolithically stacked high performance High-k Metal Gate (HKMG) devices, the world’s most advanced production transistors.

3D Monolithic State-of-the-Art transistors are formed with ion-cut applied to a gate-last process, combined with a low temperature face-up layer transfer, repeating layouts, and an innovative inter-layer via (ILV) alignment scheme.

Monolithic 3D IC provides a path to reduce logic, SOC, and memory costs without investing in expensive scaling down.

Benefits

  •  Maximum State-of-the-Art transistor performance on multi-strata
  •  2x lower power
  •  2x smaller silicon area
  •  4x smaller footprint
  •  Performance of single crystal silicon transistors on all layers in the 3DIC
  •  Scalable: scales normally with equipment capability
  •  Forestalls next gen litho-tool risk
  •  High density of vertical interconnects enable innovative architectures, repair, and redundancy

HKMG 3D Flow

Create a logic layer with any transistor that uses a replacement-gate process. Innovative alignment schemes, combined with repeating layouts, obtain sub-50nm, and hence dense, through-silicon electrical connections.
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Layer Transfer Technology (“Ion-Cut”)Defect-free single crystal obtained @ <400C
Leveraging a mature technology (wafer bonding and ion-cleaving) that has been the dominant SOI wafer production method for over two decades.
Innovate and create multiple thin (10s – 100s nanometer scale) layers of virtually defect free Silicon by utilizing low temperature (<400C) bond and cleave techniques, and place on top of active transistor circuitry. Benefit from a rich layer-to-layer interconnection density.
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