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The Repeater Story

4/11/2011

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As many of you know, repeaters are gates that are inserted in the middle of long wires to speed them up. Let's discuss these interesting devices...

Picture
Repeaters were invented by Brian Bakoglu, a grad student at Stanford University, in the early 1980s. Bakoglu's Ph.D. advisor felt interconnects would become a serious problem in the next decade and asked him to explore potential solutions. The result - several ideas that are bread-and-butter to us today. Besides inventing repeaters, Bakoglu invented H-trees for clock distribution and developed SUSPENS, the first system-level simulator for processors. Yes, it's true, grad students can do great things!

In 2003, the International Solid State Circuits Conference (ISSCC) created a museum of the best papers in it's 50 year history. And you know what? Bakoglu's paper on repeaters at the 1984 ISSCC was selected among these, along with the first CMOS circuits and the first microprocessors! You can see the ISSCC museum's exhibit on Bakoglu's paper alongside. What happened to this gifted grad student who did such great things? He joined IBM after Stanford, spent 10 years there and rose to become Director of Personal Systems and Multimedia. He then went to Sony, where he was Senior VP of it's US R&D center. Bakoglu's next career move was the most interesting... In the late 1990s, during the dot-com boom, he joined a networking start-up as VP of Engineering, made a bucket-load of money, and decided to retire in his late 30s! He bought a home on a beach in Hawaii, and has lived there ever since :-) I heard he recently got bored just sitting at home, and started teaching at the University of Hawaii.


What's the situation with repeaters today? We have millions of repeaters in today's chips... Please find below a graph from IBM where they show the number of repeaters in POWER processors as a function of scaling. Between the 65nm and 45nm nodes, the number of repeaters increased by an order of magnitude! Also, IBM says repeater leakage formed more than 50% of the total leakage of their 45nm chips. If this "explosion" in number of repeaters continues, repeaters will dominate performance, power and die size of semiconductor chips 10 years from now. Interconnects degrade with scaling for two reasons: (1) Their cross-sectional area decreases while their lengths frequently don't scale, and (2) Their resistivity increases due to surface scattering, grain boundary scattering and diffusion barrier effects. Transistors improve with scaling - we are essentially using these improved transistors as repeaters to handle interconnect problems. 

How can we tackle this "explosion" in repeater counts? I wrote a paper on this at the 2006 Intl. Interconnect Technology Conference (IITC) along with some colleagues from Georgia Tech and Intel. You can find a copy of the paper here. We suggested improved repeater insertion models based on energy-delay product. We also suggested optimizing device technologies separately for repeaters and other logic transistors (in future technologies when repeaters become one of the key components on a chip, that could be possible!). Since my company does Monolithic 3D, I  recently tried to see what happens to the repeater problem when Monolithic 3D technology is used. Please find above some simulation results... this data was obtained using a CAD tool called 3DSim that I developed at MonolithIC 3D Inc. (3DSim is the 3D version of a Georgia Tech CAD tool called IntSim). Since monolithic 3D can reduce wire lengths, the number of repeaters reduces significantly, as you'd expect. So does repeater area and power consumption. Isn't that cool? :-)

- By Deepak C. Sekar

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