We have a guest contribution today from Brian Cronquist, where he talks about innovation he has been involved with in his career. He also talks about the first year of NuPGA/MonolithIC 3D Inc.'s existence, when the company was focused on FPGAs, and discusses how the transition to Monolithic 3D began.
At Sierra Semiconductor (later merged with PMC [PMC-Sierra] [Wikipedia SS]), a Silicon Valley mixed signal startup circa mid’80s, the order of the day for getting things done, as well as for innovation, was free Kona coffee, and the personal and intellectual force of a few individuals. Yup, I drank between 20-25 cups of Kona every day whilst starting up the tiny wafer fab in the old (it’s gone now) Building 3 of National Semiconductor [NSC] there on San Ysidro Way and Kifer Road….Did you know that the building was owned by an old 49er football player? (I’ll let you guess who…!). And I ate meatball sandwiches at Vito’s Pizzeria (still there [Vito's]) a few blocks south over the rail bridge on Lawrence Expressway in one end of an old ice skating rink. The fab and process stuff was mostly the solving-problems-with-limited-$$$ kinds of issues, and just a few ideas spawned from solving the technical problems (partial pressure wet oxidation to create the simultaneous gate and E2PROM inter-poly oxides, etc.). The main innovations were in design and device, driven by Roubik Gregorian [Roubik], a world class mixed signal designer, and Genda Hu, a world class device guy (and also has a famous brother: Chenming Hu [wikipedia Chenming_Hu]). Necessity of a startup and the lateral thinking of a few personalities were the drivers, and the innovation and invention focused on solving the immediate problem or next, but evolutionary, product challenges….we had VCs to please, and later, shareholders to keep happy.
When we started Chartered Semiconductor [CSM], it was more of the same……hire & train 100+ Singaporeans (for about a year at the Sierra fab above), execute, and get the new fab built and running. The innovation in cost reduction and manufacturing efficiencies (CSM became the 2nd pure foundry in the world…TSMC [TSMC] was the first), was done a year or two later by a massive, all-encompassing, and detailed implementation and execution of many of the Quality concepts from people such as Deming [Deming] and Juran [Juran]; such as QC circles, paretos, fish-bones, Kaizen, etc. We even had Juran give some classes (I still have the notes: Designing in Quality…perhaps a future blog subject). The culture was much more one of consensus, and where order, age, not stepping out of the box, etc. was the norm. For example, it took me years to figure out, and train, groups of engineers at CSM to NOT wait for me (the boss, the expat) to say the answer (or for that matter, the problem), rather, to use these QC tools to define the problem, and use the process to help solve it together….if properly done, more (and younger) heads thinking together is better than one. Reminds me of one of my favorite quotes (I have 1000s of them stored on my phone…a hobby): “If everyone is thinking alike, then somebody isn’t thinking”…General George S. Patton.
So, at CSM and Actel, it was a team orientation with a focus on solving the problem du Jour, and at Sierra and Synertek [Synertek](which we have not talked about) it was the force of will and intellect of a few individuals, but still focused on the product or problem du Jour.
We, I, others, were focused on inventing something, in order to build or fix something. And then we would stop, finish (maybe), and then be pulled onto the next problem. Maybe in a future blog piece I will talk about the ‘vicious circle’ that Esam Elashmawi [Esam] and I showed to upper management to describe an earlier dysfunctional product development system at Actel….there are some parallels to draw.
Now, on to NuPGA/MonolithIC3D.
Zvi founded NuPGA to develop a 10x more cost-effective FPGA. He had come from an ASIC and programmable logic background, having successfully started and grown both eASIC [eASIC] and Chip Express [ChipX, part of Gigoptix]. To achieve the goal of 10X higher gate density, the idea was to go with antifuse programming where the programming transistors would be on a different layer than the user logic. Some ideas for doing so as are outlined in a patent filled on April 14, 2009 (US-2011/0037497A1). But Zvi kept pushing for a better idea and the initial break-through came in late June 2009. The idea was to utilize SOI wafers and have the programming transistors and the isolation transistors built into the substrate silicon while the user programmable circuit would be built on the isolated silicon above. This idea was reported by EE Times "ASIC pioneer reinvents 3-D FPGAs” (Jan 29, 2010) [EETimes] and was presented at the "3D Interconnect - Shaping Future Technology" symposium [eds-symposium] (see Jan 2010 IEEE SCV-EDS AMAT 3D Technical Symposium at [papers]).
So, a diverse team, with extensive semiconductor industry backgrounds, was involved in numerous brainstorming sessions that created a very practical, interesting, and innovative solution to a specific problem (FPGA scaling) and was led by a man (Zvi) that has an unmatched ability to think in innovative, non-linear ways.
There were a solid set of informal rules for the innovation process:
(i) All ideas are welcome, including those that seem crazy;
(ii) No idea is shot down;
(iii) To any problem, there is a solution; we just need to find it.
So, great rules for a diverse and innovative group, but we were still focused on inventing something in orderto build or fix something.
However, Zvi kept pushing for an even better solution. In mid-2009 Zvi outlined a concept of how to use the base technology used for SOI ("Smart-Cut") for the construction of the programming transistor on top of the user logic. Another break-through.
But we were still focused on inventing something in order to build or fix something.
Then Zvi added another informal rule: Let’s not stop and make product (a kick-butt 3D FPGA) now (as most startups would do). Instead, what else can we do with these ideas? these break-throughs?
That’s when we became an IP company and changed our name (MonolithiIC 3D). To date we have generated more than 250 unique and patentable ideas which have resulted in over 35 patent applications with 1000’s of pages of specification and 1000’s of pages of drawings….with more to come. These patent applications cover many fundamental design and structural concepts that are applicable to a wide variety of semiconductor, and other, devices.
You see some of them on the web site [MonolithIC 3D Tech] and in papers [Future Fab Apr 11]. A path to build a common transistor - RCAT – on a monolithic stacked 3D layer and a path to build the most advanced transistors of the industry - HKMG - in multiple monolithic 3D IC stacked layers.
Come by booth 5585 at SemiconWest, 12-14 July, [SemiWest #5585], and see some more….memory, LED, micro-display, imager, repair and redundancy….
So, what is your experience and observation about innovation and invention in your career?
Looking forward to hearing from y’all!