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Emerging Technologies

6/23/2011

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We have a guest contribution today from Brian Cronquist, our VP of Technology. Brian reports on his trip to Whistler, Canada, for the CMOS Emerging Technologies Workshop.

We were invited to give a talk at the CMOS-ET Workshop (www.cmoset.com), Communications, Microsystems, Optoelectronics, Sensors - Emerging Technologies last week, held this year at the fabulous Whistler ski area, site of the recent Winter Olympics.

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CMOS-ET covers a broad range of new and fairly new technologies, from the biologic, to nano, to imaging & sensors, to circuits, to wireless, to photonics, and medical. In the field of semiconductors, a big topic that everybody was talking about was how scaling was becoming more difficult, perhaps close to traditional end.

Stanford professor Krishna Saraswat opened the conference with a plenary talk on Germanium and all the great work his group and others have been doing to utilize the higher mobility of Ge to help push out transistor scaling. But there are many issues still remaining with Ge transistors and fighting the inertia of the silicon world is a steep hill to climb. There were many many papers on nanowires as a solution, whether composed of heavily doped Si, un-doped silicon, or III-V elements and compounds. However, but they all had difficulties with control, yield, and interconnect….the usual suspects. (Note: copies of presentations can be had on the website [CMOS-ET 2011 papers], or, if not posted, email the authors using their addresses in the program. [CMOS-ET2011 Program]

It was also amazing at how far quantum dots have come in a few short years, though still a researchy thing. Dan Dalacu of the National Research Council of Canada gave a great in-depth and detailed talk on how well they can control the many aspects of quantum dots and photonic crystal integration into nanopyramids.

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One of the areas ripe for new materials and devices is the area of memories, which is coming quickly to many a red wall. Geoffrey Burr of IBM Alamden Research Labs gave a great analysis of all the NVM memory technologies with a view towards what could satisfy IBM’s need for Storage Class Memory (SCM). He pointed out that for 3D, a direction many memory makers are (have to) driving towards, that a high density access device is tough to construct conventionally as even a reasonable quality polysilicon diode is difficult to make with the 400oC restriction, and that other novel (= risky) devices such as MIEC (Mixed Ionic-Electronic Conduction), etc. are also not too desirable.

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His overall message was that if 3D NAND succeeds, it will win. If not, then novel materials and structures will fill in the gap.

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Deepak recently presented [link to presento] some ideas at NCCAVS [NCCAVS 15 June 2011] we have had at Monolithic 3D Inc. on how to tackle the DRAM issue. Shortly we will show how we can address Geoffrey’s access device concern, and more, by utilizing monolithic 3D breakthrough techniques and architectures.

Stay tuned!

See you at SemiconWest [SWest #5585] this coming 12-14 July. 

PS: Next blog, I will talk about what Stanford Professor Fabian Pease had to say about 3D-IC to a packed room at Whistler…..btw: here’s what I talked about at Whistler… [Cronquist Whistler 16 June 2011]

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