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"Achieving Success In The Age of Nano Tech"

10/20/2011

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We have a guest contribution today from Zvi Or-Bach, the President and CEO of MonolithIC 3D Inc. In this post, Zvi shares his perspective on where the industry is going after attending the recent Future Horizons conference (IEF-2011).

I am happy to be back from an European trip which included participation in the annual Semiconductor Strategy event organized by Future Horizons. I am even more happy to present a short and somewhat biased excerpt of this 2 days most respected conference.

We start with two slides I pulled out of Malcolm Penn’s presentation. Clearly, we expect the industry to continue it growth path, but with sharp fluctuations of demand. As Malcolm summarized it: "Difficult (impossible) to balance capacity vs. loading.”
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The revenue per wafer chart at the various levels was quite illuminating and caused me to admire TSMC’s ability to manage being the number one in volume and average price per wafer. The large gap between the wafer price at the foundry level vs. the OEM level could be an excellent motivation to push technology forward with the expectation to reduce competition (see Deepak's blog on the drive to 450mm).
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We all know that future technology driver is the mobile internet. It is encouraging, however, that this drive would be supported by multiple products offered by multiple companies, broadening our industry’s base:
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Freescale presented a $137B opportunity for their ASSP business, mostly from the "Zero Fatalities on the Road" new market they expect to see when electronics, GPS, and connectivity, will make cars help us staying alive. That was followed later by Alberto Sangiovanni-Vincentelli’s bold forecast: "In 5 years cars would be able to drive themselves".
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But Freescale presentation included some of the challenges our industry faces with R&D costs doubling at each node, where GigaFab investment is projected to exceed $10B and the number of design starts per node is dropping drastically.
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Luc Van den Hove’s (IMEC President & CEO) relatively long presentation of over 100 slides argued that we are mostly done with "Lithography Enabled Scaling" and that we are now at the "Materials Enabled Scaling:"
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And—music to my ears—that we are soon to move into a "3D Enabled Scaling:"
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Maria Marced, president of TSMC Europe presented some details of the amazing job TSMC has been doing. For my purpose, though, I choose here a slide showing the rapid cost increase of scaling these days, and the even faster increase expected at future technology nodes.
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I was unable to persuade Maria to attach specific numbers to the Y axis, other than stating that those are large numbers. Clearly, future scaling-down will not provide cost saving, as the chart clearly shows. This fact was also reiterated in Mentor’s presentation.
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To cheer us all up, Stanley Williams of HP Labs presented the progress HP made with memristors. HP hopes to release a very compelling alternative to NAND Flash soon, and believes that with memristors the industry could march on providing Moore’s Law without lithography scaling for the next 20 years.
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I was happy to follow him presenting our own innovation that enables a practical monolithic 3D technology. Monolithic 3D provides an alternative for lithography scaling both for memory products as well as for logic designs.
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I will end with a few slides by Mentor, IMEC, and Global Foundries that speak for themselves:
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