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Signal Wire Length Distribution for 2D and 3D-ICs

The IntSim CAD tool relies on predicting the distribution of wire lengths on a chip, and using these for determining gate sizes and multilevel interconnect networks. Several researchers have developed models for this purpose, including Donath (1970s) [14], Davis (late-1990s) [15] and Christie (2000) [16]. In this work, the Davis distribution is used, since it is the most widely-referenced and is considered one of the most accurate [17]. Fig. M1 shows the equations used for the Davis distribution and Fig. M2 shows comparisons with data from commercial microprocessors.

    Fig. M1: Equations used in the Davis distribution for 2D-ICs [15].                                    Fig. M2: Comparison of Davis distribution with actual data [15].

The value of Rent's constants k and p are determined from previous generations of a certain chip. For example, various generations of the Intel Pentium chips, such as the Pentium, Pentium Pro and the Pentium 4, all had similar Rent's constants [17][18]. It is generally accepted that custom chips such as microprocessors have Rent's constant p = 0.55 while standard-cell ASICs have Rent's constant p = 0.65 [31], although there may be variations on a case-by-case basis. Rent's constant k is typically around 4.

Several researchers have extended the Davis distribution to model monolithic 3D integrated circuits. These include Souri [19], Rahman [20] and Joyner [21]. In this work, the Rahman model was chosen. Fig. M3 shows results from the Rahman model when it is applied to 3D-ICs with 1, 2 and 4 device layers.

Fig. M3: Results from the Rahman wire length distribution for monolithic 3D integrated circuits [20]