We have a guest contribution today from Ze'ev Wurman, the Chief Software Architect of MonolithIC 3D Inc. In this blog-post, Ze'ev discusses some industry implications of recent events relating to science education. Ze'ev has participated in developing California’s education standards and assessments in mathematics since the mid-1990s. Between 2007 and 2009, he served as a senior policy adviser at the U.S. Department of Education. Throughout their development Wurman analyzed the Common Core mathematics standards drafts for the Pioneer Institute. In the summer of 2010 he served on the California Academic Content Standards Commission that reviewed the adoption of Common Core for California. Wurman earned his BSEE and MSEE degrees from the Technion in Israel, and he is a recipient of the Eliyahu Golomb Israel Security Award.
Interesting bit in
EETimes about a
new effort to develop standards for 3D IC development.
According to the
report in
EETimes, the group of companies contributing to the
3-D enablement program at
SEMATECH has just grown by six.
From what I hear at meetings, Qualcomm is one of the companies really driving towards production of 3D chips/packages. Of course, it makes perfect sense given their commitment to the mobile market, with its attendant constraints on power and footprint combined demands for significantly better system performance.
Dr. Garrou has an
excellent post that includes a segment on work at Penn State and IBM on the ways that dense TSVs can impact thermal management.
We have a guest contribution today from Israel Beinglass, the CTO of MonolithIC 3D Inc. Israel was an executive at Applied Materials for many years, and is considered one of the leading industry experts in epi technology. He served as a board member at SiGen in the late 1990s (for those who are not familiar with SiGen, it was one of the first companies that worked on ion-cut technology). In this post, Israel discusses and compares different techniques to obtain stacked monocrystalline semiconductor layers.
The DAC Blog has a
very nice report on Dr. Walden Rhines' discussion of 3D ICs at the recent GlobalPress event. The post presents more details than I've seen in other reports. If you're interested in seeing what one of the true EDA luminaries is thinking about 3D,
go read this post...
Electronics Weekly has an interesting
story about a pile of
EV Group (EVG) equipment going in to a 300mm line at CEA-Leti.
Believe it or not, the answer is "TRUE"!
Who did it?It was Matrix Semiconductor, a Silicon Valley startup, who
shipped the world's first monolithic 3D products in 2003. These were One-Time Programmable (OTP) non-volatile memory chips that had multiple layers of polysilicon diodes in series with antifuses. See picture alongside.
Paul McLellan made an interesting series of posts over on his
edagraffiti blog a while back. If you're interested in the EDA perspective on 3D ICs, you should go check them out. You probably should go read them just because Dr. McLellan is a great writer who always adds value with his observations. His list of relevant posts includes:
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